A processor or CPU (Central Processing Unit) in a computer system controls the components of the system by means of software, usually the operating system. A processor generally includes registers, an arithmetic-logic unit, an instruction decoder that translates machine instructions into usable instructions and, if so required, breaks the machine instructions down into individual processing steps, as well as a control unit that controls the remaining components of the processor by setting suitable signals. In this case, a register is a memory for intermediate results (for example, of arithmetic operations) that can be very quickly accessed. It supplies a data path and the control unit with data without wait cycles in accordance with set signals.
In order to increase the power of a processor, so-called hyperthreading is frequently used in modern processors. Hyperthreading refers to the parallel processing of so-called threads (also referred to as execution threads), as well as of processes, by means of at least two logic processors that are realized on a common chip. In this context, a thread characterizes the execution sequence in which the software of the system is processed, and represents a sequential processing cycle of a processor.
The processors are referred to as logic processors because at least parts of the hardware are only provided once and jointly used by the processors. The size and number of the arithmetic-logic units usually remain unchanged. However, certain hardware components are provided redundantly. For example, an additional register set is made available in order to realize two logic processors on one chip. Also provided is a separate so-called Advanced Programmable Interrupt Controller (APIC) that accepts interrupt requests from devices in the system and other internal housekeeping structures. Both logic processors largely operate independently of one another such that the data throughput and the capacity utilization of the physical processor are increased and its resources can be better utilized.
The efficiency of individual threads is often significantly restricted by interruptions (also referred to as interrupts). So-called synchronous interrupts are brought about by the program itself that is currently being run. Synchronous interrupts do not change the sequence of instructions that are stored in an instruction pipeline of the thread and must be executed. Here, an instruction pipeline is a series of instructions that are successively processed in a thread. An example of a synchronous interrupt is missing address translation information (a so-called “TLB (Translation Lookaside Buffer) miss”). In addition, a number of other synchronous interrupts may occur due to the hardware or software, and triggered by the program code currently being processed.
In addition, asynchronous interrupts occur that may be unrelated to the current program such as messages from other processors (for example, during a power failure) or peripheral devices of the system, wherein the instructions to be executed that are stored in the instruction pipeline of the thread must be discarded in order to instead load and process instructions of a routine for processing the interrupt.
In this case, each interrupt usually leads to a type of thread state change that is equivalent to an interruption of the currently running process and the initiation of a program for processing the interrupt. In this case, the current context of the thread (register contents, address of the interrupt) must be stored in a main memory and thus secured. Subsequently, the processor must store data for processing the interrupt (for example, the address of a certain instruction or the access address for which the address entry is missing) in registers for the interrupt processing, i.e., a context for the actual processing of the interrupt must be loaded. This procedure requires much time and effort that frequently leads to the loss of several hundred processor cycles before the interrupted context can be retrieved from the memory again and resumed.
The instructions for processing the (interrupted) program in the instruction pipeline are discarded when an interrupt request occurs. The pipeline is subsequently filled with instructions required for processing the interrupt. After the interrupt has been processed, the instruction pipeline must again be cleared and filled in order to continue the previously interrupted program or to start a new program, wherein this once again requires much time and computing power.